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Tuesday, September 26, 2006

Intel touts 45nm technology, upcoming architectures [i]

By Prince McLean

Published: 06:25 PM EST

Presenting at the Intel Developer Forum in San Francisco on Tuesday, Intel boss Paul Otellini said the chipmaker plans to introduce new micro-architectures about every 2 years and remains on track to debut its first 45nm products during the second half of 2007.

45nm technology remains on track

Performance and energy efficiency "all start with the transistor" Otellini said, describing Intel's legacy of advancing Moore's Law and its industry-leading silicon technology and manufacturing capability.

Intel was the first to implement advanced 65nm silicon manufacturing technology in 2005, integrating power-saving features into the process that were critical to delivering power-efficiency at the transistor level. Otellini said the company is now officially shipping the majority of its processors on 65nm, before any other company had even shipped a single production unit.

Looking ahead, Intel's next-generation 45nm technology is on track for production in the second half of 2007 as planned, and Otellini disclosed for the first time that the company has fifteen 45nm products already in development across desktop, mobile, and enterprise segments.

The first of the 45nm products is on track to complete its design in the fourth quarter of this year, he said, adding that the company sports an extensive 45-nm factory network with more than 500,000 square feet of clean room space and more than $9 billion invested.

Intel Fab 32 in Arizon
Construction of Intel Fab 32 in Arizon -- Clean Room Completed


Nehalem and Gesher architectures

Otellini estimated that the "cadence" of these manufacturing process technologies which follow Moore's Law, coupled with Intel's plans to introduce new micro-architectures about every 2 years, will result in significant performance-per-watt improvement over today's Core micro-architecture products by 2010.

He showed a chart that mapped out new micro-architectures coming in 2008 (code-named Nehalem and targeted at 45nm) followed by another in 2010 (code-named Gesher and targeted at 32nm). These new micro architectures will be developed by separate teams working in parallel, and targeted for intersection with specific future process technologies, he said.

Intel Fab 28 in Israel
Construction of Intel Fab 28 in Israel


"By the end of the decade we will deliver a 300 percent increase in performance per watt over today's processors," said Otellini. "This improved power and performance will enable developers and manufacturers to develop systems with incredibly exciting new capabilities."

To demonstrate how Moore's Law will continue well into the future with amazing potential, the Intel chief showed a new research prototype processor that has 80 floating point cores on a single die. The tiny silicon die on this experimental chip, just 300mm˛, is capable of achieving a Teraflop of performance, or 1 trillion floating point operations per second. He contrasted this with Intel's historic breakthrough 11 years ago with the world's first Teraflop supercomputer, a massive machine powered by nearly 10,000 Pentium Pro processors in more than 85 large cabinets occupying about 2,000 square feet.

Filed under : Future Hardware 91 Comments ] 
Story topics: Nehalem   Print ] [ Story Link ] 


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